2013/03/13 ver.2 page 1 sp n 5 0 03 n-channel enhancement mode mosfet description applications the SPN5003 is the n- channel logic enhancement mode power field effect transistor which is produced with high voltage bicmos technology. this device is particularly suited for reducing the no load consumption in pc power, tv power and adapter. desk pc power supply ac adapter lcd tc power supply features pin configuration 500v/10ma,r ds(on) =250 ? @v gs =10v reduce power consumption at no load for epa/climate saver application sop-8 and dip-8 package design sop-8p dip-8p d1 d2 d3 gnd s1 s2 g s3 part marking sop-8p dip-8p a: lot code b: date code SPN5003 aaaaaa bbbbbb sp n 5003 aaaaaa bbbbbb
2013/03/13 ver.2 page 2 sp n 5 0 03 n-channel enhancement mode mosfet pin description pin symbol description 1 s1 source 1 2 s2 source 2 3 g gate 4 s3 source 3 5 ground ground 6 d3 drain 3 7 d2 drain 2 8 d1 drain 1 ordering information part number package part marking SPN5003s8rgb sop-8 SPN5003 SPN5003d8tgb dip-8 SPN5003 SPN5003s8rgb : tape reel ; pb C free ; halogen - fr ee SPN5003d8tgb : tube ; pb C free ; halogen - free absoulte maximum ratings (t a =25 unless otherwise noted) parameter symbol typical unit drain-source voltage v dss 500 v gate Csource voltage v gss +20 v continuous drain current(t j =150 ) t a =25 i d 30 ma t a =70 20 pulsed drain current i dm 200 ma power dissipation t a =25 p d 1.3 w t a =70 1.0 operating junction temperature t j 150 storage temperature range t stg -55/150 thermal resistance-junction to ambient r ja 80 /w
2013/03/13 ver.2 page 3 sp n 5 0 03 n-channel enhancement mode mosfet electrical characteristics (t a =25 unless otherwise noted) parameter symbol conditions min. typ max. unit static drain-source breakdown voltage v (br)dss v gs =0v,i d =40ua 500 v gate threshold voltage v gs(th) v ds =v gs ,i d =250ua 0.75 1.3 2.25 gate leakage current i gss v ds =0v,v gs =+20v 20 ua zero gate voltage drain current i dss v ds =400v,v gs =0v 25 ua on-state drain current i d(on) v ds 5v,v gs =10v 25 ma drain-source on-resistance r ds(on) v gs = 10v,i d =10ma 160 250 ? v gs = 4.5v,i d =10ma 180 250 ? diode forward voltage v sd i s =10ma,v gs =0v 0.8 1.0 v dynamic gate-source charge q gs v ds =50v,v gs =10v i d = 25ma 1 nc turn-on time t d(on) v dd =50v, r l =2.7 ? v gen =5v, r g =3 ? 20 ns t r 16 turn-off time t d(off) 4 t f 3.8
2013/03/13 ver.2 page 4 sp n 5 0 03 n-channel enhancement mode mosfet sop-8 package outline
2013/03/13 ver.2 page 5 sp n 5 0 03 n-channel enhancement mode mosfet dip- 8p package outline
2013/03/13 ver.2 page 6 sp n 5 0 03 n-channel enhancement mode mosfet information provided is alleged to be exact and con sistent. sync power corporation presumes no respon sibility for the penalties of use of such information or for any vio lation of patents or other rights of third parties which may result from its use. no license is granted by allegation or otherwise un der any patent or patent rights of sync power corpo ration. conditions mentioned in this publication are subject to change without notice. this publication surpasses and re places all information previously supplied. sync power corporation produc ts are not authorized for use as critical component s in life support devices or systems without express written approval of sync power corporation. ?the sync power logo is a registered trademark of s ync power corporation ?2010 sync power corporation C printed in taiwan C all rights reserved sync power corporation 7f-2, no.3-1, park street nankang district (nksp), taipei, taiwan, 115, r.o.c phone: 886-2-2655-8178 fax: 886-2-2655-8468 ?http://www.syncpower.com
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